Question QMC1 : The following options are all key features of a Von Neumann machine EXCEPT __________
Question QMC2 : How many path(s) is/are there between the main memory and the control unit of a von Neumann machine?
Question QMC3 : Which of the following options is not an example of a mechanical or electro-mechanical computer?
Question QMC4 : The following options are all trends encountered during the era of first generation computers EXPECT?
Question QMC5 : The second generation computers started with the advent of _____________?
Question QMC6 : Which of the following options is NOT an error detection or correction code?
Question QMC7 : The following options are all examples of typical CPU registers EXCEPT ______________?
Question QMC8 : Which of these options is NOT a typical action performed on fetched instructions loaded into an instruction register?
Question QMC9 : Interrupts generated internally by the CPU, on certain exceptional events during instruction execution (e.g. division by zero, arithmetic overflow) are called?
Question QMC10 : The following options are all basic logical identities used in Boolean algebra EXCEPT:
Question QMC11 : ________ gate is an electronic circuit that gives a high output (1) only if all its inputs are high.
Question QMC12 : All the following options are typical logic gate symbols EXCEPT?
Question QMC13 : Which option typically represents the logic gate symbol for NAND gates?
Question QMC14 : Which option typically represents the logic gate symbol for NOR?
Question QMC15 : Which of the following options is NOT a method used for the simplification of Boolean expressions (minimisation of gates)?
Question QMC16 : Which of these options is NOT an example of sequential circuits?
Question QMC17 : A shared bus that connects the CPU, memory and input/output is called a system bus and may consist of 50 to 100 separate lines. Which of the following options is NOT a broad category of the functional groups that is used to classify the lines?
Question QMC18 : Which of the following options is NOT a scheme for bus arbitration?
Question QMC19 : When considering the memory hierarchy of the computer system, which of the following options has the fastest access time?
Question QMC20 : Which of the following options is NOT a terminology used for identifying the comparative behaviour of various memory devices and technologies?
Question QMC21 : Information from memory devices can be accessed in all the following ways EXCEPT:
Question QMC22 : Which of the following options does NOT increase the bandwidth of the processor‑memory interface?
Question QMC23 : Which option is NOT a typical function of the Input / Output (I/O) Module?
Question QMC24 : An input/output module is used for all the following reasons EXCEPT:
Question QMC25 : When considering instructions sets, the operands which can be used in an instruction can be categorised into four general categories. Which of the following options is NOT one of such categories?
Question QMC26 : In register architecture, the register set of the computers are often classified according to the number of addresses in instructions. Which of the following options is NOT a valid classification?
Question QMC27 : Which of the following options is NOT a valid category when classifying operations specified in instructions, irrespective of the number of addresses in an instruction?
Question QMC28 : Which of the following options is NOT considered when selecting addressing bits?
Question QMC29 : The following options are all examples of ‘program visible registers’ EXCEPT:
Question QMC30 : In digital computers in general, there are various types of micro-operations - primitive action performed by a machine on the data stored in the registers. Which of the following options is NOT a valid category?
Question QMC31 : Which of the following options is NOT a characteristic representation of a typical 32 bit floating point number?
Question QMC32 : Which of the following options is NOT a basic responsibility of the control unit?
Question QMC33 : Which of the following options is NOT an input to the control unit?
Question QMC34 : Which of the following options is NOT a typical characteristic of ‘Highly Encoded Microinstructions’??
Question QMC35 : When designing sequencing techniques for micro-instructions, which of the following is not a factor influencing the length of the micro-instruction?
Question QFB1 : A __________________ is a sequence of instructions designed for achieving a task or goal.
Question QFB2 : One megabyte (MB) is equal to __________________ kilobytes (KB)? (numeric answer only)
Question QFB3 : The binary number 101010 is equivalent to ...................... in decimal. (numeric answer only)
Question QFB4 : The octal number (23.4)8 is equivalent to ___________________ in decimal. (numeric answer only)
Question QFB5 : The hexadecimal number (F2)16 is equivalent to ___________ in decimal system. (numeric answer only)
Question QFB6 : The equivalent of the decimal number 13 in binary is ______________________.
Question QFB7 : With regards to binary numbers, the 2's complement of 1010 is equivalent to ______________?
Question QFB8 : The processing needed for a single instruction (fetch and execute) is referred to as a/an ___________ cycle.
Question QFB9 : ____________ algebra is used for designing and analysing digital circuits.
Question QFB10 : [ A.(B.C) = (A.B).C ] and [ A+ (B+C) = (A+B)+C ] are examples of ________ law in Boolean algebra
Question QFB11 : Digital systems are said to be constructed using __________ gates.
Question QFB12 : Given the logic gate symbol above, if A = 1, and B = 1, what is the output Q?
Question QFB13 : Given the logic gate symbol above, if A = 0, and B = 0, what is the output Q?
Question QFB14 : Given the logic gate symbol above, if A = 1 and B = 0, what is the output Q?
Question QFB15 : The ___________ bus provides a path for moving data between the system modules
Question QFB16 : Given the truth table for a 2-input ‘OR’ gate above, what is the value of Q?
Question QFB17 : Typical, Redundant Array of Independent Disks (RAID) implementations have _____________ levels
Question QFB18 : A/An _____________ set is a collection of all the instructions a CPU can execute.
Question QFB19 : When considering instructions sets, _______________ processing instructions are used for arithmetical and logic operations in a machine.
Question QFB20 : When considering instruction sets, _______________ instructions are used for testing the status of computation through Processor Status Word (PSW).
Question QFB21 : The term “_________ scheme” refers to the mechanism employed for specifying operands.
Question QFB22 : When considering ‘Status and Control Registers’, the ____________ flag indicates whether the sign of a previous arithmetic operation was positive (0) or negative (1)
Question QFB23 : When considering ‘Status and Control Registers’, the ____________ flag will be set if the results of the last arithmetic operation was zero
Question QFB24 : A machine has 16 general purpose registers. ___________ bits will be needed for the register address of this machine.
Question QFB25 : ___________ are used by the control unit for determining the status of the CPU.
Question QFB26 : In Wikes design of a microprogram control unit, a microinstruction has two major components: the control field, and the ________ field.
Question QFB27 : The microinstruction cycle typically consists of two basic cycles; the fetch and the ____________ cycle.
Question QFB28 : The ___________ unit is responsible for initialising various registers during the start-up of the machine
Question QFB29 : A _________ is a set of connections between two or more components/devices that are designed to transfer several/all bits of a word from a specific source to destination
Question QFB30 : The information from memory devices can be accessed in the following ways: Random Access; Sequential Access; and ________________ Access.
Question QFB31 : When considering the access time on disk, ________________ time is the time required by a sector to reach below the read/write head.
Question QFB32 : Instructions are represented as sequence of __________.
Question QFB33 : An instruction _______ is used to define the layout of the bits allocated to these elements of instructions.
Question QFB34 : If a memory of 4K words (1 word = 16 bit) is to be addressed directly then it requires ______ bits for word addressing
Question QFB35 : If a memory of 4K words (1 word = 16 bit) is to be addressed directly then it requires ______ bits for byte addressing